The invention relates to a method and apparatus that reduces the motor audible noise induced by using the single current shunt feedback topology of PWM inverter drives. This invention is an extension of U.S. Ser. No. 11/552,758, filed Oct. 25, 2006 (U.S. Patent Publication No. 2007/0090785A1) entitled AUDIBLE NOISE REDUCTION FOR SINGLE CURRENT SHUNT PLATFORM, the contents of which are incorporated herein by reference.
FIG. 1a shows the Space Vector Plane of a 2-level inverter for a motor drive. The vectors correspond to the condition of the high side switches in the inverter of the motor drive, i.e., 100 means the high side switch for the U phase is on and the low side switches of the V and W phases are on. See FIGS. 4 and 4A. In order to observe dc link current and allow reliable current sampling, minimum pulse constraint (FIG. 1b) has to be imposed whenever the voltage vector enters the shaded regions (Sector Crossings of FIG. 1a). This means that the minimum pulse spacing cannot be less than Tmin, otherwise the sampled currents from the DC link shunt sensor are not reliable.
In application Ser. No. 11/552,758, a motor drive is described and shown and a method for audible noise reduction is disclosed. The motor drive is also shown in FIG. 4 herein. This method of motor audible noise reduction involves the reduction of the total number of minimum pulse clampings adaptively inside the shaded regions of FIG. 1a. This is done by introducing a new scheduling for minimum pulse insertion. When the voltage vector enters the sector-crossing area (shaded area), the current feedback sampling rate and motor controller bandwidth are modified in accordance with the new scheduling. As soon as the voltage vector exits the shaded regions, nominal feedback sampling rate and motor controller bandwidth are resumed. In addition, the new scheduling for minimum pulse insertion is adaptive to motor speed. This is done to maximize the achievable controller bandwidth. In this adaptive feedback sampling regime, the PWM switching frequency is unaltered and hence the characteristic of PWM induced harmonics is preserved.
In FIG. 4, the DC link supplies power to the inverter 30. Current samples are taken via the single shunt element, typically a resistor R.
In a 2-level inverter system like that of FIG. 4, the instantaneous current waveform in the DC link is composed of current pulses. The current pulse width reduces as the modulation index (motor speed) decreases up to a point where minimum pulse constraint (hardware dependent, typically 0.5 to 2 usec) has to be imposed in order to acquire reliable current feedback data via the DC link shunt element. As a consequence of this minimum pulse constraint, the current harmonic increases. The motor audible noise spectrum also increases and is spread out which leads to unacceptable noise performance in some applications.